This invention relates to sample and hold circuits. More particularly, this invention relates to circuits and methods for canceling harmonic distortion produced in sample and hold circuits.
Sample and hold circuits are widely used to sample a voltage and hold it at a constant level so that another circuit such as an analog-to-digital converter connected to the sample and hold circuit can measure the held voltage. In many sample and hold circuits, however, harmonic distortion is produced by components of the circuits that limit the useful voltage range of an input signal, limit the useful frequency of the input signal and require a circuit designer to use more expensive components in the circuits to eliminate the distortion that would otherwise be caused by inferior components. This distortion may be produced, for example, by non-linear resistance characteristics of switches in the sample and hold circuits that are caused by effects such as MOSFET threshold turnoff, bulk effect, switch ratio match variations and process variations. This distortion may also be produced by parasitic capacitances of switches in the sample and hold circuits, charge injection modulation of some switches by other switches in the sample and hold circuits, non-linear load currents in input source resistances that are caused by semiconductor junctions of switches in the sample and hold circuits, and terminal resistances of switches in the sample and hold circuits.